This invention relates to charge coupled devices (CCDs) and more particularly to an output circuit for a CCD imager.
In a typical CCD imager, signal charge representative of incident radiation is accumulated in an array of pixels in an image area. Following an integration period, signal charge is transferred to an output register by applying appropriate clocking or drive pulses to control electrodes. The signal charge is then read out from the output register and applied to a charge detection circuit to produce a voltage which is representative of the amount of signal charge.
In a paper by Hynecek entitled xe2x80x9cCCM-A New Low-Noise Charge Carrier Multiplier Suitable For Detection Of Charge In Small Pixel CCD Image Sensorsxe2x80x9d IEEE Trans. Of Electron Devices Vol. 39, No. 8, pp 1972-1975, August 1992, a proposal is made to multiply charge carriers within the CCD image area during the transfer process as signal charge is clocked from pixel to pixel to the output register. The suggested technique involves establishing large electric fields in the semiconductor material beneath pairs of control electrodes which in conventional operation are controlled to collect and move signal charge through the CCD elements. The required large fields may be obtained by using a large difference in drive voltages applied to adjacent CCD control electrodes during the transfer process. Signal charge carriers are thus accelerated to sufficiently high velocities by the large field regions that, on transfer between regions under the control electrodes, additional carriers are generated through impact ionisation. Although the charge multiplication per transfer is generally low, typically up to 1%, a usefully large signal gain may be achieved because of the large number of transfers normally required for signal readout in a practical device. As the additional noise associated with the multiplication process is low, the increased signal level gives an improvement in the overall signal-to-noise ratio of the detector. The concept of carrier multiplication is also known in other types of solid state detectors, such as avalanche photodiodes, for example.
The present invention seeks to provide a CCD in which charge multiplication can be implemented giving several advantages over the previously proposed technique.
According to the invention, there is provided a CCD imager comprising: an image area, an output register which receives signal charge from the image area, a separate multiplication register into which signal charge from the output register is transferred, and means for obtaining signal charge multiplication by transferring the charge through a sufficiently high field region in elements of the multiplication register.
An advantage of employing the present invention is that charge multiplication is carried out in a region separate from the conventional CCD structure, such as the image area or a store region, and is conveniently an extended section of the CCD output register. Thus the multiplication register and its operation may be optimised without taking into account the parameters and structure required for the conventional functioning of the CCD imager, and no adaption of those parameters or structure is required to implement carrier multiplication. In the previously proposed arrangement, carrier multiplication occurs within the existing active structure of the device but this structure must simultaneously also be optimised for parameters such as dark current, quantum efficiency and peak signal level, placing constraints on design and operation, and requiring compromises.
Another advantage of the present invention is that it is applicable to any type of CCD architecture, such as for example, one using inter-line transfer.
The charge received by the output register from the image area may be transferred directly or via an intermediate store region, for example. Similarly, although preferably the signal charge is directly transferred from the output register to the multiplication register there may be other intervening structure.
For some applications the electrical field produced in the elements of the multiplication register to achieve signal charge multiplication may be varied in magnitude with time and/or in dependence on the position of elements in the register but in general, for those elements at which multiplication is required, the same field is produced.
In a particularly advantageous embodiment of the invention, signal charge is transferred in series from the output register through each element of the multiplication register. This avoids possible column-to-column gain variation, essentially a fixed pattern noise, which might occur in the normal image area and store regions of the CCD in the previously proposed technique. However, it may be appropriate in some applications to associate each element of the output register with a respective different multiplication section. This would in effect result in a multiplication register formed as an array in separate columns. This may lead to column-to-column gain variations however and would also reduce the amount of multiplication available for the same amount of space which is occupied by the multiplication register. It would give some advantages over the previously proposed approach as carrier multiplication is carried out in a region separate from the normal active CCD regions.
Use of the invention enables the same multiplication factor to be applied to signal charge accumulated in each pixel of the image area, whereas in the technique proposed by Hynecek the amount of multiplication is dependent on the location of signal charge in the image area, that charge undergoing more transfers to move it to the output register being multiplied by a correspondingly large amount.
It is preferred that a sufficiently high electrical field is produced in each element of the multiplication register to achieve the required signal charge multiplication. However, in some arrangements, it may be appropriate to produce the required electrical field in only some of the available elements in the multiplication register.
The number of elements in the multiplication register is not critical and can be chosen to give a useful increase in signal-to-noise ratio. A sufficiently large number of elements may achieve photon counting performance, that is, achieving sufficient low noise multiplication that the numbers of photons generating electron-hole pairs in each pixel may be unambiguously determined by the signal charge detected at the output.
In an advantageous embodiment of the invention, the number of elements of the multiplication register is approximately an integral multiple of the number of elements of the output register. The integral multiple may be one or more and by xe2x80x9capproximatelyxe2x80x9d it is meant that the number of multiplication register elements is only a few more or less than the number of elements, or a multiple thereof, of the output register such that both the output register and the multiplication register can be read out at the same rate. It is particularly preferred that means are included for synchronising signal read out from the multiplication register with the line timing of a television rate signal. Where the multiplication register section has approximately the same number of elements as the output register, or a multiple greater than 1 thereof, it allows device operation to be synchronised with the normal active line periods. Parallel transfer of any line of signal charges from an adjacent store region of the CCD to the output register takes place during the TV line-blanking intervals. These charges are then serially transferred from the output register to the multiplication register during the normal active TV line period whilst, at the same time, the previous line of charges that had been transferred to the multiplication register and temporarily held during the line-blanking interval is transferred to the charge detection circuit to give a signal output. All transfer through the multiplication register, whether during the transfer-in or the transfer-out operation from that register, may be carried out with charge multiplication, with the magnitude of the multiplication factor controlled as explained below.
In one embodiment of the invention, the amount of signal charge multiplication obtained is controlled by controlling the amplitude of one or more drive pulses applied to the multiplication register to transfer signal charge therethrough. Alternatively, or in addition, the amount of signal charge multiplication obtained is controlled by controlling the level of one or more dc potentials applied to the multiplication register. Thus the multiplication factor is externally controlled using the pulses and/or potentials applied to operate the transfer of charge through the multiplication register, and these pulses and potentials may be different from those used for the conventional part of the CCD.
Preferably, the charge capacity of one or more of the elements of the multiplication register is larger than that of elements of the output register. This enables the higher signal levels resulting from multiplication to be accommodated. The elements of the multiplication register may have the same charge capacity, or the charge capacity for those elements nearer the charge detection circuit may be larger as they can be expected to hold higher charge levels.
Advantageously, signal limiting means may be included to prevent excess signal charge from an element of the multiplication register spreading into another element of the multiplication register. The signal limiting means may be similar to the structures used for anti-blooming in the image area of the device.
An imager in accordance with the invention may have a plurality of output registers associated with respective ones of a plurality of multiplication registers and charge detection circuits to permit read out from different regions of the device.
As in accordance with the present invention a multiplication register is included which is separate from the imaging and storage areas of a conventional CCD imager, it may be used in conjunction with any of the other features associated with high performance CCDs without re-designing the CCD structure itself or affecting other characteristics. For example, a multiplication register may be used in CCDs which are: back-thinned and treated devices for high quantum efficiency, inverted mode devices for low dark current, devices with anti-blooming and/or phosphor coatings, deep depletion devices for improved IR response, or any combination of these features or others.